Hyperscale FPGA Engineering Systems at Microsoft
- R. Rydberg ,
- Madison N. Emas ,
- John Demme ,
- Ana Ibarra ,
- Kara Kagi ,
- Brandon Klouchek ,
- A. Lawande ,
- Todd Massengill ,
- David J. Powers ,
- Andrew Putnam
Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2026 |
Published by Association for Computing Machinery
Microsoft has deployed FPGAs at hyperscale for over a decade, powering diverse application domains and products. While the underlying EDA tool flow remains familiar (synthesis, place & route, and verification), the engineering system that supports FPGA development at Microsoft looks nothing like a traditional hardware flow. Instead, it borrows heavily from modern cloud-scale software practices: Git for version control, Azure DevOps for automated pipelines, extensive regression suites, and daily compiles, effectively adapting the software mantra of ”ship every day” to the hardware world as ”tape-out every day.” The sharpest break from traditional hardware practice, and often the hardest adjustment for hardware engineers joining Microsoft, is that quality comes not only from extensive pre-silicon verification, but even more so from rapid testing of new builds in controlled production environments on real applications. New FPGA images are tested in contained production environments, on real hardware and real applications, giving higher confidence and faster iteration than traditional verification regimes can deliver. This paper describes how this system operates and how it has evolved across multiple FPGA generations, how teams across organizational and geographic boundaries collaborate, the unique challenges of scale, and the cultural and technical shifts required to make FPGAs feel like software. This paper also shares surprising statistics, from the sheer number of daily builds to the compute hours consumed, that highlight what it takes to run FPGA development like a hyperscale cloud service.